UPD703003 查看數據表（PDF） - NEC => Renesas Technology

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UPD703003

V853™ 32/16-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

µPD703003

4. CPU FUNCTIONS

The CPU employs a RISC-based architecture and uses five-stage pipeline control to enable single-clock execution

of almost all instructions.

The features of the CPU functions are shown below.

• Minimum instruction execution time

30 ns (during internal 33-MHz operation)

• Address space: 16-Mbyte linear

• General registers: 32 bits × 32 registers

• Internal 32-bit architecture

• 5-stage pipeline control

• Multiply/divide instructions

• Saturated operation instructions

• 32-bit shift instruction: 1 clock

• Long/short format

• Four types of bit manipulation instructions

• Set

• Clear

• Not

• Test

16

Data Sheet U12261EJ2V1DS00

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