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UPD703003 查看數據表(PDF) - NEC => Renesas Technology

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UPD703003
NEC
NEC => Renesas Technology NEC
UPD703003 Datasheet PDF : 82 Pages
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µPD703003
Table 6-1. List of Interrupts (2/2)
Type Category
Name
Interrupt/Exception Source
Control
Register
Trigger Source
Default
Exception Handler Restored
Unit Priority Code Address
PC
Level
Maskable Interrupt INTCSI3
CSIC3 CSI3 transmit/receive completion SIO 24 0200H 00000200H nextPC
Interrupt INTSER0
SEIC0 UART0 receive error
SIO 25 0210H 00000210H nextPC
Interrupt INTSR0
SRIC0 UART0 receive completion
SIO 26 0220H 00000220H nextPC
Interrupt INTST0
STIC0 UART0 transmit completion
SIO 27 0230H 00000230H nextPC
Interrupt INTSER1
SEIC1 UART1 receive error
SIO 28 0240H 00000240H nextPC
Interrupt INTSR1
SRIC1 UART1 receive completion
SIO 29 0250H 00000250H nextPC
Interrupt INTST1
STIC1 UART1 transmit completion
SIO 30 0260H 00000260H nextPC
Interrupt INTAD
ADIC A/D conversion completion
ADC 31 0270H 00000270H nextPC
Remarks 1. Default priority: The default priority level is the level that takes precedence when multiple
maskable interrupt requests having the same priority level occur at the same
time. The highest priority level is level 0.
Restored PC: This is the PC value that is saved to EIPC or FEPC when interrupt or exception
handling is started. However, if an interrupt occurs during execution of the DIVH
(divide) instruction, the restored PC value is the PC value of the current instruction
(DIVH).
2. The invalid instruction execution address can be obtained using (restored PC-4) when an invalid
instruction code exception occurs.
20
Data Sheet U12261EJ2V1DS00

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