MSM5238GS-2K 查看數據表（PDF） - Oki Electric Industry

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MSM5238GS-2K

32-DOT LCD COMMON DRIVER

Oki Electric Industry 

¡ Semiconductor

MSM5238

FUNCTIONAL DESCRIPTION

Pin Functional Description

• DI

Shift register data input pin which inputs the data on scanning lines in synchronization with

a clock (positive logic). This LSI can optionally divide the scanning signal up to 1/32 duty LCD

panel because it consists of the 32-bit shift register.

• CP

Clock pulse input pin for the 32-bit shift register. The data is shifted to the 32-bit shift register

at the falling edge of the clock pulse. A data set up time (tSETUP) and data hold time (tHOLD) are

required between DI and CP. (Refer to Switching Characteristics.) A Schmitt circuit is included

in the CP input circuit.

• DF

Synchronous signal input pin for alternate signal for LCD driving.

• VDD, VSS

VDD is a power supply pin, which is normally from 3.0V to 7.0V. VSS is a ground pin, which

is 0V.

• O1 - O32

Display data output pins which correspond to each data bit in the latch. One of V1, V2, V3 and

VEE (V4) is selected as a display driving voltage source based on the combination of latched

data level and DF signal. Refer to the Truth Table. O1 - O32 are connected to the common side

of the LCD panel.

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