CY7C1362C-166BGI 查看數據表（PDF） - Cypress Semiconductor

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CY7C1362C-166BGI

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Cypress Semiconductor 

.

Logic Block Diagram – CY7C1360C (256K x 36)

A0, A1, A

MODE

ADDRESS

REGISTER

2

A[1:0]

ADV

CLK

ADSC

ADSP

BWD

BWC

BWB

BWA

BWE

GW

CE1

CE2

CE3

OE

DQD ,DQPD

BYTE

WRITE REGISTER

DQC ,DQPC

BYTE

WRITE REGISTER

DQB ,DQPB

BYTE

WRITE REGISTER

DQA ,DQPA

BYTE

WRITE REGISTER

ENABLE

REGISTER

Q1

BURST

COUNTER

CLR AND Q0

LOGIC

PIPELINED

ENABLE

DQD ,DQPD

BYTE

WRITE DRIVER

DQC ,DQPC

BYTE

WRITE DRIVER

DQB ,DQPB

BYTE

WRITE DRIVER

DQA ,DQPA

BYTE

WRITE DRIVER

ZZ

Selection Guide

SLEEP

CONTROL

Maximum Access Time

Maximum Operating Current

Maximum CMOS Standby Current

250 MHz

2.8

250

40

CY7C1360C

CY7C1362C

MEMORY

ARRAY

SENSE

AMPS

OUTPUT

REGISTERS

OUTPUT

BUFFERS

E

DQs

DQPA

DQPB

DQPC

DQPD

INPUT

REGISTERS

200 MHz

166 MHz

Unit

3.0

3.5

ns

220

180

mA

40

40

mA

Document #: 38-05540 Rev. *H

Page 2 of 31

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