CY7C199C-15VI 查看數據表（PDF） - Cypress Semiconductor
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CY7C199C-15VI Datasheet PDF : 12 Pages
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Write Cycle No. 2 (CE Controlled)17 18 19
Address
CE
tSA
WE
Data In/Out
High Z
tWC
tSCE
tAW
tSD
Data-In Valid
CY7C199C
tHA
tHD
High Z
Write Cycle No. 3 (WE Controlled, OE Low)20
t WC
Address
tSCE
CE
WE
tAW
tSA
tPWE
Data
In/Out
Undefined
see footnotes
tHZWE
tSD
Data-In Valid
tHA
tHD
tLZWE
Undefined
See Footnotes
Notes:
17. This cycle is CE controlled.
18. Data In/Out is high impedance if OE = VIH.
19. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high–impedance state.
20. The cycle is WE controlled, OE low. The minimum write cycle time is the sum of tHZWE and tSD.
Document #: 38-05408 Rev. *A
Page 9 of 12
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