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CY7C199CN-12VI 查看數據表(PDF) - Cypress Semiconductor

零件编号
产品描述 (功能)
生产厂家
CY7C199CN-12VI
Cypress
Cypress Semiconductor Cypress
CY7C199CN-12VI Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Timing Waveforms (continued)
Write Cycle 1 (WE controlled) [13, 14, 15]
Address
CE
tSA
WE
OE
tHZOE
Data In/Out
Undefined
see footnotes
Write Cycle 2 (CE controlled) [14, 16, 17]
Address
CE
tSA
WE
Data In/Out
High Z
tWC
tSCE
tAW
tPWE
tSD
Data-In Valid
tWC
tSCE
tAW
tSD
Data-In Valid
CY7C199CN
tHA
tHD
tHA
tHD
High Z
Notes
13. This cycle is WE controlled, OE is HIGH during write.
14. Data in and/or out is high impedance if OE = VIH.
15. During this period the IOs are in output state and input signals must not be applied.
16. This cycle is CE controlled.
17. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
Document #: 001-06435 Rev. *B
Page 8 of 14

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