CY7C401 查看數據表（PDF） - Cypress Semiconductor

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CY7C401

64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO

Cypress Semiconductor 

Switching Waveforms (continued)

Bubble Through, Data In To Data Out Diagram

SHIFT IN

CY7C401/CY7C403

CY7C402/CY7C404

SHIFT OUT

OUTPUT READY

DATA OUT

tBT

tSOR

tPOR

Master Reset Timing Diagram

MASTER RESET

INPUT READY

OUTPUT READY

SHIFT IN

DATA OUT

tPMR

tDIR

tDOR

tDSI

tLZMR

Output Enable Timing Diagram

OUTPUT ENABLE

DATA OUT

tHZOE

tOOE

NOTE 10

C401–12

C401–13

C401–14

6

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