CY7C4255V-15(2001) 查看數據表（PDF） - Cypress Semiconductor
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CY7C4255V-15 Datasheet PDF : 20 Pages
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Pin Configuration
STQFP
Top View
CY7C4255V/CY7C4265V
CY7C4275V/CY7C4285V
D15
1
D14
2
D13
3
D12
4
D11
5
D10
6
D9
7
D8
8
D7
9
D6
10
D5
11
D4
12
D3
13
D2
14
D1
15
D0
16
CY7C4255V
CY7C4265V
CY7C4275V
CY7C4285V
48
Q14
47
Q13
46
GND
45
Q12
44
Q11
43
VCC
42
Q10
41
Q9
40
GND
39
Q8
38
Q7
37
Q6
36
Q5
35
GND
34
Q4
33
VCC
4275V–3
Functional Description (continued)
The CY7C4255/65/75/85V provides five status pins. These
pins are decoded to determine one of five states: Empty, Al-
most Empty, Half Full, Almost Full, and Full (see Table 2). The
Half Full flag shares the WXO pin. This flag is valid in the
stand-alone and width-expansion configurations. In the depth
expansion, this pin provides the expansion out (WXO) informa-
tion that is used to signal the next FIFO when it will be acti-
vated.
The Empty and Full flags are synchronous, i.e., they change
state relative to either the read clock (RCLK) or the write clock
(WCLK). When entering or exiting the Empty states, the flag is
updated exclusively by the RCLK. The flag denoting Full states
is updated exclusively by WCLK. The synchronous flag archi-
tecture guarantees that the flags will remain valid from one
clock cycle to the next. The Almost Empty/Almost Full flags
become synchronous if the VCC/SMODE is tied to VSS. All
configurations are fabricated using an advanced 0.35µ
CMOS technology. Input ESD protection is greater than
2001V, and latch-up is prevented by the use of guard rings.
Selection Guide
Maximum Frequency (MHz)
Maximum Access Time (ns)
Minimum Cycle Time (ns)
Minimum Data or Enable Set-Up (ns)
Minimum Data or Enable Hold (ns)
Maximum Flag Delay (ns)
Active Power Supply
Current (ICC1) (mA)
Commercial
Industrial
7C4255/65/75/85V-10
100
8
10
3.5
0
8
30
7C4255/65/75/85V-15
66.7
10
15
4
0
10
30
35
7C4255/65/75/85V-25
40
15
25
6
1
15
30
Density
Package
CY7C4255V
8K x 18
64-pin 10x10 TQFP
CY7C4265V
16K x 18
64-pin 10x10 TQFP
CY7C4275V
32K x 18
64-pin 10x10 TQFP
CY7C4285V
64K x 18
64-pin 10x10 TQFP
Document #: 38-06012 Rev. **
Page 2 of 20
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