CY7C4255-15(2004) 查看數據表（PDF） - Cypress Semiconductor

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CY7C4255-15
(Rev.:2004)

8K/16K x 18 Deep Sync FIFOs

Cypress Semiconductor 

Switching Waveforms (continued)

Half-Full Flag Timing

WCLK

WEN

HF

RCLK

REN

tCLKH

tCLKL

tENS tENH

tHF

HALF FULL OR LESS

HALF FULL + 1

OR MORE

tHF

tENS

Programmable Almost Empty Flag Timing

tCLKH

WCLK

WEN

PAE [20]

RCLK

REN

Note:

21. PAE is offset = n. Number of data words into FIFO already = n.

tCLKL

tENS tENH

tPAE

N + 1 WORDS

IN FIFO

tPAE

tENS

CY7C4255

CY7C4265

HALF FULLOR LESS

4255–12

n WORDS IN FIFO

4255–13

Document #: 38-06004 Rev. *B

Page 10 of 22

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