CY7C4255-15AXC(2005) 查看數據表（PDF） - Cypress Semiconductor

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CY7C4255-15AXC
(Rev.:2005)

8K/16K x 18 Deep Sync FIFOs

Cypress Semiconductor 

CY7C4255

CY7C4265

Switching Characteristics Over the Operating Range (continued)

7C42X5-10 7C42X5-15 7C42X5-25 7C42X5-35

Parameter

Description

Min. Max. Min. Max. Min. Max. Min. Max. Unit

tXI

Expansion in Pulse Width

4.5

6.5

10

14

ns

tXIS

Expansion in Set-Up Time

4

5

10

15

ns

tSKEW1

Skew Time between Read Clock and Write Clock 5

for Full Flag

6

10

12

ns

tSKEW2

Skew Time between Read Clock and Write Clock 5

for Empty Flag

6

10

12

ns

tSKEW3 Skew Time between Read Clock and Write Clock 10

15

18

20

ns

for Programmable Almost Empty and Program-

mable Almost Full Flags (Synchronous Mode

only)

Document #: 38-06004 Rev. *C

Page 6 of 22

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