IS61C256AH 查看數據表（PDF） - Integrated Silicon Solution
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IS61C256AH Datasheet PDF : 8 Pages
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IS61C256AH
PIN CONFIGURATION
28-Pin DIP and SOJ
A14 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
I/O0 11
I/O1 12
I/O2 13
GND 14
28 VCC
27 WE
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 I/O7
18 I/O6
17 I/O5
16 I/O4
15 I/O3
PIN CONFIGURATION
28-Pin TSOP
OE 22
A11 23
A9 24
A8 25
A13 26
WE 27
VCC 28
A14 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
ISSI ®
21 A10
20 CE
19 I/O7
18 I/O6
17 I/O5
16 I/O4
15 I/O3
14 GND
13 I/O2
12 I/O1
11 I/O0
10 A0
9 A1
8 A2
PIN DESCRIPTIONS
A0-A14
CE
OE
WE
Address Inputs
Chip Enable Input
Output Enable Input
Write Enable Input
I/O0-I/O7 Bidirectional Ports
Vcc
Power
GND
Ground
TRUTH TABLE
Mode
WE
Not Selected X
(Power-down)
Output Disabled H
Read
H
Write
L
CE OE I/O Operation Vcc Current
HX
High-Z
ISB1, ISB2
LH
High-Z
ICC
LL
DOUT
ICC
LX
DIN
ICC
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
VTERM
TBIAS
TSTG
PT
IOUT
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current (LOW)
Value
Unit
–0.5 to +7.0
V
–55 to +125
°C
–65 to +150
°C
1.5
W
20
mA
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR020-1O
05/24/99
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