CY8C27466 查看數據表（PDF） - Cypress Semiconductor
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CY8C27466 Datasheet PDF : 39 Pages
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CY8C27x66 Preliminary Data Sheet
1. Pin Information
1.1.3 48-Pin Part Pinouts
Table 1-3. 48-Pin Part Pinout (SSOP)
Pin
Type
Pin
No. Digital Analog Name
Description
CY8C27666 48-Pin PSoC Device
1
IO
2
IO
3
IO
4
IO
5
IO
6
IO
I
P0[7] Analog column mux input.
IO P0[5] Analog column mux input and column output.
IO P0[3] Analog column mux input and column output.
I
P0[1] Analog column mux input.
P2[7]
P2[5]
AI, P0[7] 1
AIO, P0[5] 2
AIO, P0[3] 3
AI, P0[1] 4
P2[7] 5
P2[5] 6
48 Vdd
47 P0[6], AI
46 P0[4], AIO
45 P0[2], AIO
44 P0[0], AI
43 P2[6], External VREF
7
IO
I
P2[3] Direct switched capacitor block input.
AI, P2[3] 7
42 P2[4], External AGND
8
IO
I
P2[1] Direct switched capacitor block input.
AI, P2[1] 8
41 P2[2], AI
9
IO
P4[7]
P4[7] 9
40 P2[0], AI
10
IO
P4[5]
P4[5] 10
39 P4[6]
11
IO
P4[3]
P4[3] 11
38 P4[4]
12
IO
13
Power
P4[1]
SMP
Switch Mode Pump (SMP) connection to
P4[1] 12
SMP 13
SSOP
37 P4[2]
36 P4[0]
external components required.
P3[7] 14
35 XRES
14
IO
P3[7]
P3[5] 15
34 P3[6]
15
IO
P3[5]
P3[3] 16
33 P3[4]
16
IO
P3[3]
P3[1] 17
32 P3[2]
17
IO
P3[1]
P5[3] 18
31 P3[0]
18
IO
P5[3]
P5[1] 19
30 P5[2]
19
IO
P5[1]
I2C SCL, P1[7] 20
29 P5[0]
20
IO
P1[7] I2C Serial Clock (SCL)
I2C SDA, P1[5] 21
28 P1[6]
21
IO
22
IO
P1[5]
P1[3]
I2C Serial Data (SDA)
P1[3] 22
I2C SCL, XTALin, P1[1] 23
27 P1[4], EXTCLK
26 P1[2]
23
IO
P1[1] Crystal (XTALin), I2C Serial Clock (SCL)
Vss 24
25 P1[0], XTALout, I2C SDA
24
Power
Vss
Ground connection.
25
IO
P1[0] Crystal (XTALout), I2C Serial Data (SDA)
26
IO
P1[2]
27
IO
P1[4] Optional External Clock Input (EXTCLK)
28
IO
P1[6]
29
IO
P5[0]
30
IO
P5[2]
31
IO
P3[0]
32
IO
P3[2]
33
IO
P3[4]
34
IO
P3[6]
35
Input
XRES Active high pin reset with internal pull down.
36
IO
P4[0]
37
IO
P4[2]
38
IO
P4[4]
39
IO
P4[6]
40
IO
I
P2[0] Direct switched capacitor block input.
41
IO
I
P2[2] Direct switched capacitor block input.
42
IO
P2[4] External Analog Ground (AGND)
43
IO
P2[6] External Voltage Reference (VREF)
44
IO
I
P0[0] Analog column mux input.
45
IO
IO P0[2] Analog column mux input and column output.
46
IO
IO P0[4] Analog column mux input and column output.
47
IO
I
P0[6] Analog column mux input.
48
Power
Vdd
Supply voltage.
LEGEND: A = Analog, I = Input, and O = Output.
June 1, 2004
Document No. 38-12019 Rev. *B
10
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