DM9000B(2012) 查看數據表（PDF） - Davicom Semiconductor, Inc.

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DM9000B
(Rev.:2012)

Ethernet Controller with General Processor Interface

Davicom Semiconductor, Inc. 

DM9000B

Ethernet Controller with General Processor Interface

8.1 Basic Mode Control Register (BMCR) - 00 ................................................................................................. 35

8.2 Basic Mode Status Register (BMSR) - 01................................................................................................... 36

8.3 PHY ID Identifier Register #1 (PHYID1) - 02 .............................................................................................. 37

8.4 PHY ID Identifier Register #2 (PHYID2) - 03 .............................................................................................. 37

8.5 Auto-negotiation Advertisement Register (ANAR) - 04 ............................................................................... 38

8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05 ................................................................... 39

8.7 Auto-negotiation Expansion Register (ANER)- 06 ...................................................................................... 39

8.8 DAVICOM Specified Configuration Register (DSCR) - 16.......................................................................... 40

8.9 DAVICOM Specified Configuration and Status Register (DSCSR) - 17 ..................................................... 40

8.10 10BASE-T Configuration/Status (10BTCSR) - 18..................................................................................... 42

8.11 Power down Control Register (PWDOR) - 19 ........................................................................................... 43

8.12 (Specified config) Register – 20 ................................................................................................................ 43

9. Functional Description .................................................................................................... 45

9.1 Host Interface .............................................................................................................................................. 45

9.2 Direct Memory Access Control.................................................................................................................... 45

9.3 Packet Transmission ................................................................................................................................... 45

9.4 Packet Reception ........................................................................................................................................ 45

9.5 100Base-TX Operation ............................................................................................................................... 46

9.5.1 4B5B Encoder...................................................................................................................................... 46

9.5.2 Scrambler............................................................................................................................................. 46

9.5.3 Parallel to Serial Converter.................................................................................................................. 46

9.5.4 NRZ to NRZI Encoder.......................................................................................................................... 46

9.5.5 MLT-3 Converter .................................................................................................................................. 46

9.5.6 MLT-3 Driver ........................................................................................................................................ 46

9.5.7 4B5B Code Group ............................................................................................................................... 47

9.6 100Base-TX Receiver ................................................................................................................................. 48

9.6.1 Signal Detect........................................................................................................................................ 48

9.6.2 Adaptive Equalization .......................................................................................................................... 48

9.6.3 MLT-3 to NRZI Decoder ....................................................................................................................... 48

9.6.4 Clock Recovery Module....................................................................................................................... 48

9.6.5 NRZI to NRZ ........................................................................................................................................ 48

9.6.6 Serial to Parallel................................................................................................................................... 48

9.6.7 Descrambler......................................................................................................................................... 48

9.6.8 Code Group Alignment ........................................................................................................................ 49

9.6.9 4B5B Decoder...................................................................................................................................... 49

9.7 10Base-T Operation .................................................................................................................................... 49

9.8 Collision Detection ...................................................................................................................................... 49

9.9 Carrier Sense .............................................................................................................................................. 49

9.10 Auto-Negotiation........................................................................................................................................ 49

9.11 Power Reduced Mode............................................................................................................................... 50

Final

4

Version: DM9000B-13-DS-F03

March 5, 2012

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