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DM9008CEP 查看數據表(PDF) - Davicom Semiconductor, Inc.

零件编号
产品描述 (功能)
生产厂家
DM9008CEP
Davicom
Davicom Semiconductor, Inc. Davicom
DM9008CEP Datasheet PDF : 52 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
3. Features
DM9008C
Ethernet Controller with General Processor Interface
Supports processor interface: byte/word of I/O
command to internal memory data operation
Integrated 10M transceiver With HP Auto-MDIX
Supports back pressure mode for half-duplex
IEEE802.3x flow control for full-duplex mode
Supports wakeup frame, link status change and
Supports early Transmit
Supports automatically load vendor ID and
product ID from EEPROM
Optional EEPROM configuration
Very low power consumption mode:
– Power reduced mode (cable detection)
magic packet events for remote wake up
Support 100M Fiber interface.
Integrated 16K Byte SRAM
Build in 3.3V to 1.8V regulator
Supports IP/TCP/UDP checksum generation and
checking
– Power down mode
– Selectable TX drivers for 1:1 or 1.25:1
transformers for additional power reduction.
Compatible with 3.3V and 5.0V tolerant I/O
DSP architecture PHY Transceiver.
48-pin LQFP, 0.18 um process
Preliminary
7
Version: DM9008C-13-DS-P01
January 15, 2008

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