QL4036-4PF144M 查看數據表（PDF） - QuickLogic Corporation
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QL4036-4PF144M
QuickLogic Corporation
QL4036-4PF144M Datasheet PDF : 12 Pages
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QL4036 - QuickRAMTM
FIGURE 2. QuickRAM Module
Software support for the complete QuickRAM fam-
ily, including the QL4016, is available through two
basic packages. The turnkey QuickWorksTM pack-
age provides the most complete ESP software solu-
tion from design entry to logic synthesis, to place and
route, to simulation. The QuickToolsTM packages
provides a solution for designers who use Cadence,
Exemplar, Mentor, Syn-opsys, Synplicity, Viewlogic,
Veribest, or other third-party tools for design entry,
synthesis, or simulation.
The QuickLogic variable grain logic cell features up
to 16 simultaneous inputs and 5 outs within a cell
that can be fragmented into 5 independent cells.
Each cell has a fan-in of 29 including register and
control lines (see Figure 4).
WDATA
WADDR
RAM
Module
(1,152 bits)
RDATA
RADDR
WDATA
RAM
Module
(1,152 bits)
RDATA
PRODUCT SUMMARY
Product Summary
Product Summary
Total of 204 I/O Pins
s 196 bi-directional input/output pins, PCI-compliant for
5.0 volt and 3.3 volt buses for -1/-2/-3/-4 speed grades
s 8 high-drive input/distributed network pins
Eight Low-Skew Distributed Networks
s Two array clock/controlnetworks available to the logic
cell flip-flop clock, set and reset inputs - each driven by
and input-only pin
s Six global clock/control networks available to the logic
cell F1, clock, set and reset inputs and the input and I/O
register clock, reset and enable inputs as well as the out-
put enable control - each driven by an input-only or I/O
pin, or any logic cell output or I/O cell feedback
High Performance
s Input + logic cell + output total delays under 6 ns
s Data path speeds over 400 MHz
s Counter speeds over 300 MHz
s FIFO speeds over 160+ MHz
QS
A1
A2
A3
A4
AZ
A5
A6
OS
OP
B1
B2
C1
OZ
C2
MP
MS
QZ
D1
D2
E1
E2
NP
NZ
NS
F1
F2
F3
F4
FZ
F5
F6
QC
QR
FIGURE 4. Logic Cell
FIGURE 3. QuickRAM Module bits
6-32
32
Preliminary
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