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DS1666 查看數據表(PDF) - Dallas Semiconductor -> Maxim Integrated

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DS1666
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS1666 Datasheet PDF : 9 Pages
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DS1666
The DS1666 is uniquely designed to provide a potentiometer that is pseudo-logarithmic rather than linear
across its entire range. The lower half of the potentiometer advances 1% of total resistance for each 3%
of scale advanced, providing for precise amplification of low volume signals. The upper half of the
potentiometer advances 2% of resistance for every 1% of scale advanced, providing for the lower
resolution gain required for high volume amplification.
GRAPH OF AUDIO TAPER Figure 1
OPERATION
The DS1666 has a total of 128 tap-points including the VL and VH terminals. A total of 127 resistive
segments exist between the VL and VH terminals. These tap-points are accessible to the VW terminal
whose position is controlled via a 3-terminal control port. A block diagram of the DS1666 is shown in
Figure 2.
The 3-terminal port of the DS1666 provides an increment/ decrement interface which is activated via a
chip select input. This interface consists of the input signals CS , INC , and U/ D . These input signals
control a 7-bit up/down counter. The output of the 7-bit up/down counter controls a 1 of 128 decoder to
select wiper position. The timing diagram for the 3-terminal interface control is shown in Figure 4.
ANALOG CHARACTERISTICS
The DS1666 has a pseudo-logarithmic resistor array that resembles an audio taper potentiometer as
shown in Figure 1. Taps on the lower portion of the potentiometer increment 0.25% of the total
resistance and are specified to within ±0.5% of the expected value. Taps on the higher portion increment
1.5% of the total resistance and are specified to within ±2.0% of the expected value.
End-to-End Resistance Tolerance = ±20 %
Temperature Coefficient = 750 PPM/°C typical
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102899

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