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DS1831A 查看數據表(PDF) - Maxim Integrated

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产品描述 (功能)
生产厂家
DS1831A
MaximIC
Maxim Integrated MaximIC
DS1831A Datasheet PDF : 14 Pages
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DS1831/A/B
The ST input can be derived from many microprocessor outputs. The most typical signals used are the
microprocessor address signals, data signals, or control signals. When the microprocessor functions
normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to time-out. To
guarantee that the watchdog timer does not time-out, a transition must occur at or less than the minimum
times shown in Table 1. A typical circuit example is shown in Figure 10. The watchdog timing is shown
in Figure 11.
The DS1831A watchdog function cannot be disabled. The watchdog strobe input must be strobed to avoid
a watchdog time-out however the watchdog status output can be disconnected yielding the same result.
WATCHDOG CIRCUIT EXAMPLE Figure 10
VSENSE1
VCC
R1
PBRST5V
PBRST3.3V
IN1
NMI1
R2
µP
DS1831
ST
WDS
GND
TDWD
10kW
TIMING DIAGRAM — STROBE INPUT Figure 11
INVALID
EDGES
VALID
EDGES
ST
tST
WDS
MIN
tTD
INDETERMINATE
EDGES
MAX
10 of 14

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