DS1863 查看數據表（PDF） - Maxim Integrated

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DS1863

Burst-Mode PON Controller With Integrated Monitoring

Maxim Integrated 

Burst-Mode PON Controller

With Integrated Monitoring

Block Diagram

SDA

SCL

VCC

GND

MON1

MON2

MON3

I2C

INTERFACE

VCC

TEMP

SENSOR

DS1863 MEMORY ORGANIZATION

LOWER MEMORY

EEPROM/SRAM

ADC CONFIG/RESULTS

SYSTEM STATUS BITS

ALARM/WARNING COMPARISON RESULTS/THRESHOLDS

SRAM RESET

TABLE 01h

EEPROM

TABLE 02h

EEPROM

TABLE 03h

EEPROM

TABLE 04h TABLE 05h

EEPROM EEPROM

PW1

USER MEMORY

AND ALARM

TRAPS

CONFIGURATION

AND

CALIBRATION

PW2

USER MEMORY

MODULATION

LUT

TRACKING

ERROR LUT

POWER ON ANALOG

VCC > VPOA

NONMASKABLE

INTERRUPT

13-BIT

ADC

RIGHT

SHIFT

DIGITAL LIMIT

COMPARATOR FOR

ADC RESULTS

INTERRUPT

MASK

LATCH

ENABLE

INTERRUPT

LATCH

INTERRUPT

MASK

INTERRUPT

LATCH

BEN

SAMPLE

CONTROL

MUX

BMD

HBIAS QUICK

TRIP LIMIT

HTXP QUICK

TRIP LIMIT

LTXP QUICK

TRIP LIMIT

APC SETPOINT FROM

TRACKING ERROR TABLE

MUX

8-BIT DAC

W/SCALING

TX-D

MUX

DS1863

MAX BIAS

QUICKTRIP

DIGITAL APC

INTEGRATOR

13-BIT

DAC

MODULATION LOOKUP

TABLE (TABLE 04h)

8-BIT DAC

W/SCALING

TX-F

FETG

BIAS

MOD

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