DS2720 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS2720

Efficient, Addressable Single-Cell Rechargeable Lithium Protection IC

Dallas Semiconductor -> Maxim Integrated 

DS2720

POWER MODES

The DS2720 has two power modes: active and sleep. While in active mode, the DS2720 continuously

performs safety monitoring. In sleep mode, the DS2720 ceases monitoring activities and drives both the

charge and discharge protection FETs to an “off state”. Upon returning to the active mode from the sleep

mode, DS2720 resumes safety monitoring and conditionally turns on the protection FETs.

Table 2. POWER MODE TRANSITION CONDITIONS

Active ® Sleep

Sleep ® Active(1)

VDD < VUV

PS pulled to VSS or

VPLS > VDD + VCH

(1) DS2720 does not transition to Active Mode if VDD < VSC.

RECHARGEABLE Li+ PROTECTION CIRCUITRY

During active mode, the DS2720 constantly monitors cell voltage and voltage drop across the FETs to

protect the battery from overcharge (overvoltage), overdischarge (undervoltage), and excessive discharge

currents (overcurrent, short circuit). Conditions and DS2720 responses are described in the sections

below and summarized in Table 3 and Figure 3.

Table 3. PROTECTION CONDITIONS AND DS2720 RESPONSES

CONDITION

NAME

Overvoltage

ACTIVATION

THRESHOLD DELAY RESPONSE

VDD > VOV

tOVD(1)

CC = VOLCC

RELEASE

THRESHOLD

VDD < VCE or

VDD - VPLS > VOC

Undervoltage

VSC < VDD < VUV

tUVD

CC = VOLCC

DC = VOLDC

VPLS > VDD + VCH and

VDD > VUV

(charger connected)

Recovery Charge

VDD < VSC or

(while in active

mode) VDD < VCE

RTST enabled(2)

VDD ³ VCE

Overcurrent

VDD - VPLS > VOC

tOCD

CC = VOLCC

DC = VOLCC

VPLS > VDD - VOC(3)

Short Circuit

VDD < VSC

tSCD

CC = VOLCC

DC = VOLDC

VPLS > VDD - VOC(3)

Overtemperature

Tdevice > TMAX

CC = VOLCC

DC = VOLDC

Tdevice < TMAX

All voltages are with respect to VSS.

(1) During transition from sleep to active, tOVD = 0.

(2) Recovery charge current is limited by RTST and forward voltage of blocking diode, which prevents discharging through

RTST when recovery charge enabled.

(3) With test current ITST flowing from VDD to PLS (pullup on PLS).

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