DS2720 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS2720

Efficient, Addressable Single-Cell Rechargeable Lithium Protection IC

Dallas Semiconductor -> Maxim Integrated 

DS2720

OV—Overvoltage Flag. When set to 1, this bit indicates the battery pack has experienced an overvoltage

condition. This bit does not clear itself after the overvoltage state is corrected, and thus must be reset by

the host system. A reset of this bit should be issued after the battery voltage falls below VCE in order to

detect future events. The OV bit is a volatile R/W bit, initialized to 0 upon power-on-reset (POR).

UV—Undervoltage Flag. When set to 1, this bit indicates the battery pack has experienced an

undervoltage condition. This bit does not clear itself after the undervoltage state is corrected, and thus

should be reset by the host system in order to detect future events. The UV bit is a volatile R/W bit,

initialized to 1 upon POR.

DOC—Overcurrent Flag. When set to 1, this bit indicates the battery pack has experienced an

overcurrent (or short-circuit) condition. This bit does not clear itself after the over/shortcurrent state is

corrected, and thus should be reset by the host system in order to detect future events. The DOC bit is a

volatile R/W bit, initialized to 1 upon POR.

CC—CC Pin Mirror. This read-only bit mirrors the state of the CC output pin. The CC bit is a 1 when the

CC pin is driven high (VOHCC). The CC bit is a 0 when the CC pin is driven low (VOLCC).

DC—DC Pin Mirror. This read-only bit mirrors the state of the DC output pin. The DC bit is a 1 when

the DC pin is driven high (VOHDC). The DC bit is a 0 when the DC pin is driven low (VOLDC).

CE—Charge Enable. Writing a 0 to this bit disables charging (CC output low, external charge FET off)

regardless of cell or pack conditions. Writing a 1 to this bit enables charging, subject to override by the

presence of any protection conditions. The DS2720 automatically sets this bit to 1 when it transitions

from sleep mode to active mode. The CE bit is a volatile R/W bit, initialized to 1 upon POR.

DE—Discharge Enable. Writing a 0 to this bit disables discharging (DC output low, external discharge

FET off) regardless of cell or pack conditions. Writing a 1 to this bit enables discharging, subject to

override by the presence of any protection conditions. The DS2720 automatically sets this bit to 1 when it

transitions from sleep mode to active mode. The DE bit is a volatile R/W bit, initialized to 1 upon POR.

STATUS REGISTER

The default values for the status register bits are stored in lockable EEPROM in the corresponding bits of

address 31h. A recall data command for EEPROM block 1 recalls the default values into the status

register bits. The format of the status register is shown in Figure 5. The function of each bit is described

in detail in the following paragraphs.

Figure 5. STATUS REGISTER FORMAT

Bit 7

X

Bit 6

X

Address 01

Bit 5 Bit 4 Bit 3

0 RNAOP 0

Bit 2

X

Bit 1

X

Bit 0

X

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