DSPIC33FJ32GP202(2007) 查看數據表（PDF） - Microchip Technology

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DSPIC33FJ32GP202
(Rev.:2007)

High-Performance, 16-Bit Microcontrollers

Microchip Technology 

dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304

TABLE 1-1: PINOUT I/O DESCRIPTIONS

Pin Name Pin Type Buffer Type

Description

AN0-AN12

I

Analog Analog input channels.

CLKI

CLKO

I

ST/CMOS External clock source input. Always associated with OSC1 pin function.

O

—

Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator

mode. Optionally functions as CLKO in RC and EC modes. Always associated

with OSC2 pin function.

OSC1

OSC2

I

ST/CMOS Oscillator crystal input. ST buffer when configured in RC mode; CMOS otherwise.

I/O

—

Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator

mode. Optionally functions as CLKO in RC and EC modes.

SOSCI

SOSCO

I

ST/CMOS 32.768 kHz low-power oscillator crystal input; CMOS otherwise.

O

—

32.768 kHz low-power oscillator crystal output.

CN0-CN30

I

ST

Change notification inputs.

Can be software programmed for internal weak pull-ups on all inputs.

IC1-IC2

IC7-IC8

I

ST

Capture inputs 1/2

Capture inputs 7/8

OCFA

I

ST

Compare Fault A input (for Compare Channels 1 and 2).

OC1-OC2

O

—

Compare outputs 1 through 2.

INT0

INT1

INT2

I

ST

External interrupt 0.

I

ST

External interrupt 1.

I

ST

External interrupt 2.

RA0-RA4

I/O

RA7-RA15

ST

PORTA is a bidirectional I/O port.

RB0-RB15

I/O

ST

PORTB is a bidirectional I/O port.

RC0-RC9

I/O

ST

PORTC is a bidirectional I/O port.

T1CK

T2CK

T3CK

I

ST

Timer1 external clock input.

I

ST

Timer2 external clock input.

I

ST

Timer3 external clock input.

U1CTS

U1RTS

U1RX

U1TX

I

ST

UART1 clear to send.

O

—

UART1 ready to send.

I

ST

UART1 receive.

O

—

UART1 transmit.

SCK1

SDI1

SDO1

SS1

I/O

ST

Synchronous serial clock input/output for SPI1.

I

ST

SPI1 data in.

O

—

SPI1 data out.

I/O

ST

SPI1 slave synchronization or frame pulse I/O.

SCL1

SDA1

ASCL1

ASDA1

I/O

ST

Synchronous serial clock input/output for I2C1.

I/O

ST

Synchronous serial data input/output for I2C1.

I/O

ST

Alternate synchronous serial clock input/output for I2C1.

I/O

ST

Alternate synchronous serial data input/output for I2C1.

TMS

TCK

TDI

TDO

I

ST

JTAG Test mode select pin.

I

ST

JTAG test clock input pin.

I

ST

JTAG test data input pin.

O

—

JTAG test data output pin.

PGD1/EMUD1 I/O

PGC1/EMUC1

I

PGD2/EMUD2 I/O

PGC2/EMUC2

I

PGD3/EMUD3 I/O

PGC3/EMUC3

I

ST

Data I/O pin for programming/debugging communication channel 1.

ST

Clock input pin for programming/debugging communication channel 1.

ST

Data I/O pin for programming/debugging communication channel 2.

ST

Clock input pin for programming/debugging communication channel 2.

ST

Data I/O pin for programming/debugging communication channel 3.

ST

Clock input pin for programming/debugging communication channel 3.

VDDCORE

P

—

CPU logic filter capacitor connection.

VSS

P

—

Ground reference for logic and I/O pins.

VREF+

I

Analog Analog voltage reference (high) input.

VREF-

I

Analog Analog voltage reference (low) input.

Legend: CMOS = CMOS compatible input or output; Analog = Analog input

ST = Schmitt Trigger input with CMOS levels; O = Output; I = Input; P = Power

© 2007 Microchip Technology Inc.

Preliminary

DS70290A-page 11

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