DS_K6F4016U6G 查看數據表（PDF） - Samsung
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DS_K6F4016U6G Datasheet PDF : 9 Pages
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K6F4016U6G Family
Preliminary
CMOS SRAM
256K x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM
FEATURES
• Process Technology: Full CMOS
• Organization: 256K x16 bit
• Power Supply Voltage: 2.7~3.3V
• Low Data Retention Voltage: 1.5V(Min)
• Three State Outputs
• Package Type: 48-TBGA-6.00x7.00
GENERAL DESCRIPTION
The K6F4016U6G families are fabricated by SAMSUNG′s
advanced full CMOS process technology. The families support
industrial temperature range and 48 ball Chip Scale Package
for user flexibility of system design. The family also supports
low data retention voltage for battery back-up operation with
low data retention current.
PRODUCT FAMILY
Product Family Operating Temperature Vcc Range Speed
K6F4016U6G-F Industrial(-40~85°C)
2.7~3.3V
551)/70ns
1. The parameter is measured with 30pF test load.
2. Typical value is measured at VCC=3.0V, TA=25°C and not 100% tested.
Power Dissipation
Standby
(ISB1, Typ.)
Operating
(ICC1, Max)
PKG Type
3µA2)
4mA
48-TBGA-6.00x7.00
PIN DESCRIPTION
1
2
3
4
5
6
A
LB
OE
A0
A1
A2
CS2
B
I/O9
UB
A3
A4
CS1
I/O1
C
I/O10 I/O11
A5
A6
I/O2
I/O3
D
Vss
I/O12
A17
A7
I/O4
Vcc
E
Vcc
I/O13 DNU
A16
I/O5
Vss
F
I/O15 I/O14
A14
A15
I/O6
I/O7
G
I/O16 DNU
A12
A13
WE
I/O8
H
DNU
A8
A9
A10
A11
DNU
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Row
Addresses
Row
select
Precharge circuit.
Vcc
Vss
Memory
Cell
Array
I/O1~I/O8
I/O9~I/O16
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
Column Addresses
48-TBGA: Top View (Ball Down)
Name
Function
CS1, CS2 Chip Select Inputs
OE Output Enable Input
WE Write Enable Input
A0~A17 Address Inputs
I/O1~I/O16 Data Inputs/Outputs
Name
Vcc
Vss
UB
LB
DNU
Function
Power
Ground
Upper Byte(I/O9~16)
Lower Byte(I/O1~8)
Do Not Use
CS1
CS2
OE
Control Logic
WE
UB
LB
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
-2-
Revision 0.0
June 2003
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