DS_K7M323625M 查看數據表（PDF） - Samsung

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DS_K7M323625M

1Mx36 & 2Mx18 Pipelined NtRAM™

Samsung 

K7N323601M

K7N321801M

1Mx36 & 2Mx18 Pipelined NtRAMTM

STATE DIAGRAM FOR N tRAMTM

WRITE

READ

READ BEGIN

READ

READ

DS

DESELECT

WRITE

DS

BEGIN WRITE

WRITE

DS

READ

BURST BURST

READ

RITE

W

DS

BURST BURST

WRITE

COMMAND

DS

READ

WRITE

BURST

DESELECT

BEGIN READ

BEGIN WRITE

BEGIN READ

BEGIN WRITE

CONTINUE DESELECT

ACTION

Notes : 1. An IGNORE CLOCK EDGE cycle is not shown is the above diagram. This is because CKE HIGH only blocks the clock(CLK) input and does

not change the state of the device.

2. States change on the rising edge of the clock(CLK)

-9-

Nov. 2003

Rev 2.0

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