K7N801849B-QC25 查看數據表（PDF） - Samsung
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K7N801849B-QC25 Datasheet PDF : 18 Pages
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K7N803601B
K7N801801B
256Kx36 & 512Kx18 Pipelined NtRAMTM
STATE DIAGRAM FOR NtRAMTM
WRITE
READ
READ BEGIN
READ
READ
DS
DESELECT
WRITE
DS
BEGIN WRITE
WRITE
DS
READ
BURST BURST
READ
RITE
W
DS
BURST BURST
WRITE
COMMAND
DS
READ
WRITE
BURST
DESELECT
BEGIN READ
BEGIN WRITE
BEGIN READ
BEGIN WRITE
CONTINUE DESELECT
ACTION
Notes : 1. An IGNORE CLOCK EDGE cycle is not shown is the above diagram. This is because CKE HIGH only blocks the clock(CLK) input and does
not change the state of the device.
2. States change on the rising edge of the clock(CLK)
-7-
Nov. 2003
Rev 3.0
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