AS4LC1M16E5 查看數據表（PDF） - Alliance Semiconductor

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产品描述 (功能)

生产厂家

AS4LC1M16E5

3V 1M×16 CMOS DRAM (EDO)

Alliance Semiconductor 

Hyper page mode cycle

Symbol Parameter

tCPWD

CAS precharge to WE delay time

tCPA

Access time from CAS precharge

tRASP

RAS pulse width

tDOH

Previous data hold time from CAS

tREZ

Output buffer turn off delay from RAS

tWEZ

Output buffer turn off delay from WE

tOEZ

Output buffer turn off delay from OE

tHPC

Hyper page mode cycle time

tHPRWC

Hyper page mode RMW cycle

tRHCP

RAS hold time from CAS

Shaded areas indicate advance information.

Output enable

Symbol Parameter

tCLZ

CAS to output in Low Z

tROH

RAS hold time referenced to OE

tOEA

OE access time

tOED

OE to data delay

tOEZ

Output buffer turnoff delay from OE

tOEH

OE command hold time

tOLZ

OE to output in Low Z

tOFF

Output buffer turn-off time

Shaded areas indicate advance information.

Self refresh cycle

Std Symbol Parameter

tRASS

RAS pulse width

(CBR self refresh)

tRPS

RAS precharge time

(CBR self refresh)

tCHS

CAS hold time

(CBR self refresh)

Shaded areas indicate advance information.

AS4LC1M16E5

®

-50

Min Max

45

–

–

28

50

100K

5

–

0

13

0

13

0

13

20

–

47

–

30

–

-60

Min Max

52

–

–

35

60

100K

5

–

0

15

0

15

0

15

25

–

56

–

35

–

Unit Notes

ns

ns 16

ns

ns

ns

ns

ns

ns

ns

ns

-50

Min Max

0

–

8

–

–

13

13

–

0

13

10

–

0

–

0

13

-60

Min Max

0

–

10

–

–

15

15

–

0

15

10

–

0

–

0

15

Unit Notes

ns 11

ns

ns

ns

ns 11

ns

ns

ns 11,13

-50

Min Max

100

–

90

–

8

–

-60

Min Max

100

–

105

–

10

–

Unit Notes

µs

ns

ns

4/11/01

Alliance Semiconductor

7

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