EL4452 查看數據表（PDF） - Intersil

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EL4452

Wideband Variable-Gain Amplifier with Gain of 10

Intersil 

EL4452

AGC Circuits

The basic AGC (automatic gain control) loop is this:

FIGURE 1. BASIC AGC LOOP

A multiplier scales the input signal and provides necessary

gain and buffers the signal presented to the output load, a

level detector (shown schematically here as a diode)

converts some measure of the output signal amplitude to a

DC level, a low-pass filter attenuates any signal ripple

present on that DC level, and an amplifier compares that

level to a reference and amplifies the error to create a gain-

control voltage for the multiplier. The circuitry is a servo that

attempts to keep the output amplitude constant by

continuously adjusting the multiplier’s gain control input.

Most AGC’s deal with repetitive input signals that are

capacitively coupled. It is generally desirable to keep DC

offsets from mixing with AC signals and fooling the level

detector into maintaining the DC output offset level constant,

rather than a smaller AC component. To that end, either the

level detector is AC-coupled, or the reference voltage must

be made greater than the maximum multiplier gain times the

input offset. For instance, if the level detector output equaled

the reference voltage at 1V of EL4452 output, the 8mV of

input offset would require a maximum gain of 125 through

the EL4452. Bias current-induced offsets could increase this

further.

Depending on the nature of the signal, different level

detector strategies will be employed. If the system goal is to

prevent overload of subsequent stages, peak detectors are

preferred. Other strategies use an RMS detector to maintain

constant output power. Here is a simple AGC using peak

detection (Figure 2).

The output of the EL4452 drives a diode detector which is

compared to VREF by an offset integrator. Its output feeds

the gain-control input of the EL4452. The integrator’s output

is attenuated by the 2kΩ and 2.7kΩ resistors to prevent the

op-amp from overloading the gain-control pin during zero

input conditions. The 510kΩ resistor provides a pull-down

current to the peak level storage capacitor C1 to allow it to

drift negative when output amplitude reduces. Thus the

detector is of fast attack and slow decay design, able to

reduce AGC gain rapidly when signal amplitude suddenly

increases, and increases gain slowly when the input drops

out momentarily. The value of C1 determines drop-out

reaction rates, and the value of CF affects overall loop time

constant as well as the amount of ripple on the gain-control

line. C2 can be used to reduce this ripple further, although it

contributes to loop overshoot when input amplitude changes

suddenly. The op-amp can be any inexpensive low-

frequency type.

The major problem with diode detectors is their large and

variable forward voltage. They require at least a 2VP-P peak

output signal to function reliably, and the forward voltage

should be compensated by including a negative VD added to

VREF. Even this is only moderately successful. At the

expense of bandwidth, op-amp circuits can greatly improve

diode rectifiers (see “An Improved Peak Detector”, an

FIGURE 2.

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