EL8171IS 查看數據表（PDF） - Intersil
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EL8171IS Datasheet PDF : 11 Pages
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EL8171, EL8172
The FB+ pin is used as a REF terminal to center or to adjust
the output. Because the FB+ pin is a high impedance input,
an economical resistor divider can be used to set the voltage
at the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will
shift VOUT by VREF times the closed loop gain, which is set
by resistors RF and RG. See Circuit 2 (Figure 29).
The FB+ pin can also be connected to the other end of
resistor, RG. See Circuit 3 (Figure 30). Keeping the basic
concept that the EL8171 and EL8172 in-amps maintain
constant differential voltage across the input terminals and
feedback terminals (IN+ - IN- = FB+ - FB-), the transfer
function of Circuit 3 can be derived.
VIN/2
VCM
VIN/2
2.9V to 5V
71
2 IN+
VS+ EN
+
3 IN-
-
8 FB+ EL8171/2
6
+
5 FB- -
VS-
4
EN_BAR
VOUT
RG
RF
VREF
FIGURE 30. CIRCUIT 3 - REFERENCE CONNECTION WITH AN
AVAILABLE VREF
VOUT
=
1
+
R-R----G-F--
(
V
I
N
)
+
(
V
REF
)
A finite resistance Rs in series with the VREF source, adds
an output offset of VIN*(RS/RG). As the series resistance Rs
approaches zero, the gain equation is simplified to the above
equation for Circuit 3. VOUT is simply shifted by an amount
VREF.
External Resistor Mismatches
Because of the independent pair of feedback terminals
provided by the EL8171 and EL8172, the CMRR is not
degraded by any resistor mismatches. Hence, unlike a three
opamp and especially a two opamp in-amp, the EL8171 and
EL8172 reduce the cost of external components by allowing
the use of 1% or more tolerance resistors without sacrificing
CMRR performance. The EL8171 and EL8172 CMRR will be
108dB regardless of the tolerance of the resistors used.
Gain Error and Accuracy
The EL8172 has a Gain Error, EG, of 0.2% typical. The
EL8171 has an EG of 0.3% typical. The gain error indicated
in the electrical specifications table is the inherent gain error
of the EL8171 and EL8172 and does not include the gain
error contributed by the resistors. There is an additional gain
error due to the tolerance of the resistors used. The resulting
non-ideal transfer function effectively becomes:
VOUT
=
1
+
R-R----G-F--
× [1 – (ERG + ERF + EG)] × VIN
Where:
ERG = Tolerance of RG
ERF = Tolerance of RF
EG = Gain Error of the EL8171 or EL8172
The term [1-(ERG +ERF +EG)] is the deviation from the
theoretical gain. Thus, (ERG +ERF +EG) is the total gain
error. For example, if 1% resistors are used for the EL8171,
the total gain error would be:
= ±(ERG + ERF + EG(typical))
= ±(0.01 + 0.01 + 0.003)
= ±2.3%
Disable/Power-Down
The EL8171 and EL8172 can be powered down reducing
the supply current to typically 2.9µA. When disabled, the
output is in a high impedance state. The active low ENABLE
bar pin has an internal pull down and hence can be left
floating and the in-amp enabled by default. When the
ENABLE bar is connected to an external logic, the in-amp
will power down when ENABLE bar is pulled above 2V, and
will power on when ENABLE bar is pulled below 0.8V.
10
FN6293.1
March 9, 2006
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