EN5312Q 查看數據表（PDF） - Unspecified

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EN5312Q

Fully Integrated Voltage Mode Synchronous Buck PWM DC-DC Converter Module

Unspecified 

Rev. 0.87 – January 2006

EN5312Q

Application Information

Output Voltage Select

external divider. VSENSE must be connected to

VOUT as indicated in Figure 6.

To provide the highest degree of flexibility in

choosing output voltage, the EN5312Q family uses

a 3 pin VID, or Voltage ID, voltage select

arrangement. This allows the designer to choose

one of seven preset voltages, or to use an external

voltage divider. Internally, the output of the VID

multiplexer sets the value for the voltage reference

DAC, which in turn is connected to the non-

inverting input of the error amplifier. This allows

the use of a single feedback divider with constant

loop gain and optimum compensation, independent

of the output voltage selected.

VS2

VS1

0

0

0

0

0

1

0

1

1

0

1

0

1

1

1

1

VS0

0

1

0

1

0

1

0

1

VOUT

3.3V

2.5V

1.8V

1.5V

1.25V

1.2V

0.8V

User

Selectable

Table 1. Voltage select settings.

Table 1 shows the various VS0-VS2 pin logic states

and the associated output voltage levels. A logic

“1” indicates a connection to VIN or to a “high”

logic voltage level. A logic “0” indicates a

connection to ground or to a “low” logic voltage

level. These pins can be either hardwired to VIN or

GND or alternatively can be driven by standard

logic levels. Logic low is defined as VLOW ≤ 0.4V.

Logic high is defined as VHIGH ≥ 1.4V. Any level

between these two values is indeterminate.

External Voltage Divider

As described above, the external voltage divider

option is chosen by connecting the VS0, VS1, and

VS2 pins to VIN or logic “high”. The EN5312Q

uses a separate feedback pin, VFB, when using the

VIN

4.7uF

ENABLE

Vin

VSense

Vout

VS0

VFB

VS1

VS2

GND

VOUT

Ra

10µF

Rb

Figure 6. External Divider.

The output voltage is selected by the following

formula:

( ) VOUT

= 0.6V

1+

Ra

Rb

Ra must be chosen as 200KΩ to maintain loop gain.

Then Rb is given as:

R = 1.2x105 Ω

b VOUT − 0.6

Dynamically Adjustable Output

The EN5312Q is designed to allow for dynamic

switching between the predefined VID voltage

levels, or between the predefined output levels and

an external divider. The inter-voltage slew rate is

optimized to prevent excess undershoot or

overshoot as the output voltage levels transition.

The slew rate is identical to the soft-start slew rate

of 2mV/uS.

Input and Output Capacitors

The input capacitance requirement is 4.7uF.

Enpirion recommends that a low ESR MLCC

capacitor be used. The input capacitor must use a

X5R or X7R dielectric formulation. Y5V or

equivalent dielectric formulations loose capacitance

Rev. 0.87 – January 2006

7

www.enpirion.com

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