EPM5032-15 查看數據表（PDF） - Altera Corporation

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EPM5032-15

Programmable Logic Device Family

Altera Corporation 

MAX 5000 Programmable Logic Device Family Data Sheet

Test patterns can be used and then erased during early stages of the device

production flow. EPROM-based EPLDs in one-time-programmable

windowless packages also contain on-board logic test circuitry to allow

verification of function and AC specifications during the production flow.

Device

Programming

All MAX 5000 EPLDs can be programmed on 486- and Pentium-based

PCs with an Altera Logic Programmer card, the Master Programming

Unit (MPU), and the appropriate device adapter. The MPU checks

continuity to ensure adequate electrical contact between the adapter and

the device.

f For more information, see Altera Programming Hardware Data Sheet in this

data book.

MAX+PLUS II software can use text- or waveform-format test vectors

created with the MAX+PLUS II Text or Waveform Editor to test a

programmed device. For added design verification, designers can

perform functional testing to compare the functional behavior of a

MAX 5000 EPLD with the simulation results. (This feature requires a

device adapter with the “PLM-” prefix.)

Data I/O and other programming hardware manufacturers also offer

programming support for Altera devices.

f For more information, see Programming Hardware Manufacturers in this

data book.

QFP Carrier &

Development

Socket

MAX 5000 devices in 100-pin QFP packages are shipped in special plastic

carriers to protect the fragile QFP leads. Each carrier can be used with a

prototype development socket and programming hardware available

from Altera or Data I/O. This carrier technology makes it possible to

program, test, erase, and reprogram devices without exposing the leads to

mechanical stress.

f For detailed information and carrier dimensions, refer to theQFP Carrier

& Development Socket Data Sheet in this data book.

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Altera Corporation

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