FAN102 查看數據表（PDF） - Fairchild Semiconductor

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FAN102

Primary-Side-Control PWM Controller

Fairchild Semiconductor 

Marking Information

Pin Configuration

F- Fairchild Logo

Z- Plant Code

X- 1-Digit Year Code

Y- 1-Digit Week Code

TT- 2-Digit Die Run Code

T- Package Type (M=SOP)

P- Z: Pb Free, Y: Green Package

M- Manufacture Flow Code

Figure 4. Top Mark

Figure 5. Pin Configuration

Pin Definitions

Pin #

1

2

3

4

5

6

7

8

Name

CS

COMR

COMI

COMV

VS

GND

VDD

GATE

Description

Current Sense. This pin connects a current-sense resistor to sense the MOSFET current for

peak-current-mode control in CV mode and provides for output-current regulation in CC mode.

Cable Compensation. This pin is connects a capacitor between COMR and GND for

compensation voltage drop due to output cable loss in CV mode.

Constant Current Loop Compensation. This pin is connects a capacitor and a resistor

between COMI and GND for compensation current loop gain.

Constant Voltage Loop Compensation. This pin is connects a capacitor and a resistor

between COMV and GND for compensation voltage loop gain.

Voltage Sense. This pin detects the output voltage information and discharges time base on

voltage of auxiliary winding. This pin connects two divider resistors and one capacitor.

Ground.

Power Supply. IC operating current and MOSFET driving current are supplied using this pin.

This pin is connected to an external VDD capacitor (typically 10μF). The threshold voltages for

startup and turn-off are 16V and 5V, respectively.

PWM Signal Output. This pin outputs PWM signal and includes the internal totem-pole output

driver to drive the external power MOSFET. The clamped gate output voltage is 18V.

© 2008 Fairchild Semiconductor Corporation

FAN102 Rev. 1.0.3

3

www.fairchildsemi.com

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