AS4SD4M16(2001) 查看數據表（PDF） - Austin Semiconductor
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AS4SD4M16 Datasheet PDF : 50 Pages
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Austin Semiconductor, Inc.
SDRAM
AS4SD4M16
BURST TYPE
Accesses within a given burst may be programmed to
be either sequential or interleaved; this is referred to as the
burst type and is selected via bit M3.
The ordering of accesses within a burst is determined
by the burst length, the burst type and the starting column
address, as shown in Table 1.
A11 A10 A9 A8
A7
A6
A5
A4
A3
A2
A1
A0 Address Bus
11
10 9
Reserved* WB
8
7
Op Mode
6
5
4
3
2
1
0
CAS Latency
BT
Burst Length
Mode Register(Mx)
* Should program M11,
M10=0,0 to ensure
compatibility with future
devices.
Burst Length
M2 M1 M0
M3=0
M3=1
0
0
0
1
1
0
0
1
2
2
0
1
0
4
4
0
1
1
8
8
1
0
0
Reserved Reserved
1
0
1
Reserved Reserved
1
1
0
Reserved Reserved
1
1
1
Full Page Reserved
M8 M7
0
0
-
-
M6 - M0
Defined
-
M3
Burst Type
0
Sequential
1
Interleave
M6 M5 M4
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
CAS Latency
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
Operating Mode
Standard Operation
All other states reserved
M9
Write Burst Mode
0
Programmed Burst Length
1
Single Location Access
FIGURE 1
MODE REGISTER DEFINITION
Table 1
BURST DEFINITION
Burst
Length
2
4
8
Full Page
(y)
Starting Column
Address
A0
0
1
A1 A0
0
0
0
1
1
0
1
1
A2 A1 A0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
n = A0 - A9
location 0 - y
Order of Access Within a Burst
Type = Sequential Type = Interleaved
0-1
1-0
0-1
1-0
0,1,2,3
1,2,3,0
2,3,0,1
3,0,1,2
0,1,2,3
1,0,3,2
2,3,0,1
3,2,1,0
0,1,2,3,4,5,6,7
1,2,3,4,5,6,7,0
2,3,4,5,6,7,0,1
3,4,5,6,7,0,1,2
4,5,6,7,0,1,2,3
5,6,7,0,1,2,3,4
6,7,0,1,2,3,4,5,
7,0,1,2,3,4,5,6
Cn, Cn+1, Cn+2,
Cn+3, Cn+4…
…Cn-1,
Cn…
0,1,2,3,4,5,6,7
1,0,3,2,5,4,7,6
2,3,0,1,6,7,4,5
3,2,1,0,7,6,5,4
4,5,6,7,0,1,2,3
5,4,7,6,1,0,3,2
6,7,4,5,2,3,0,1
7,6,5,4,3,2,1,0
Not Supported
NOTE:
1. For full-page accesses: y = 256 (x16).
2. For a burst length of two, A1-A7 (x16)
select the block-of-two burst; A0 selects
the starting column within the block.
3. For a burst length of four, A2-A7 (x16)
select the block-of-four burst; A0-A1
select the starting column within the
block.
4. For a burst length of eight, A3-A7 (x16)
select the clock-of-eight burst; A0-A2
select the starting column within the
block.
5. For a full-page burst, the full row is
selected and A0-A7 (x16) select the
starting column.
6. Whenever a boundary of the block is
reached within a given sequence above,
the following access wraps within the
block.
7. For a burst length of one, A0-A7 (x16)
select the unique column to be accessed,
and Mode Register bit M3 is ignored.
AS4SD4M16
Rev. 1.5 10/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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