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AM27C4096 查看數據表(PDF) - Advanced Micro Devices

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产品描述 (功能)
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AM27C4096
AMD
Advanced Micro Devices AMD
AM27C4096 Datasheet PDF : 12 Pages
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common connection to all devices in the array and con-
nected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
System Applications
During the switch between active and standby condi-
tions, transient current peaks are produced on the ris-
ing and falling edges of Chip Enable. The magnitude of
these transient current peaks is dependent on the out-
put capacitance loading of the device. At a minimum, a
0.1 µF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and VSS to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM ar-
rays, a 4.7 µF bulk electrolytic capacitor should be used
between VCC and VSS for each eight devices. The loca-
tion of the capacitor should be close to where the
power supply is connected to the array.
MODE SELECT TABLE
Mode
Read
Output Disable
Standby (TTL)
Standby (CMOS)
Program
Program Verify
Program Inhibit
Autoselect Manufacturer Code
(Note 3)
Device Code
CE#/PGM#
OE#
A0
A9
VPP
Outputs
VIL
VIL
X
X
X
DOUT
VIL
VIH
X
X
X
High Z
VIH
X
X
X
X
High Z
VCC ± 0.3 V
X
X
X
X
High Z
VIL
VIH
X
X
VPP
DIN
VIH
VIL
X
X
VPP
DOUT
VIH
X
X
X
VPP
High Z
VIL
VIL
VIL
VH
X
01h
VIL
VIL
VIH
VH
X
19h
Notes:
1. VH = 12.0 V ± 0.5 V.
2. X = Either VIH or VIL.
3. A1–A8 and A10–17 = VIL.
4. See DC Programming Characteristics for VPP voltage during programming.
6
Am27C4096

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