FDH20N40 查看數據表（PDF） - Fairchild Semiconductor
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FDH20N40 Datasheet PDF : 6 Pages
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Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
RG
VGS
tP
0V
VDS
L
DUT
+
VDD
-
IAS
0.01Ω
Figure 11. Unclamped Energy Test Circuit
tP
IAS
BVDSS
VDS
VDD
0
tAV
Figure 12. Unclamped Energy Waveforms
VGS
Ig(REF)
VDS
RL
DUT
+
VDD
-
Figure 13. Gate Charge Test Circuit
Qg(TOT)
VDS
VGS = 10V
VGS
VGS = 1V
0
Qg(TH)
Qgs
Ig(REF)
0
Qgd
Figure 14. Gate Charge Waveforms
VDS
RL
VGS
RGS
DUT
+
VDD
-
VGS
Figure 15. Switching Time Test Circuit
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
10%
VGS
10%
0
50%
PULSE WIDTH
90%
50%
Figure 16. Switching Time Waveform
©2002 Fairchild Semiconductor Corporation
FDH20N40 / FDP20N40 Rev. A
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