RECEIVERS
Pin Descriptions
Pin Names I/O Type
Number
of Pins
Description of Signals
RxIn
I
4/3 Negative LVDS Differential Data Input
RxIn
I
4/3 Positive LVDS Differential Data Input
RxCLKIn
I
1 Negative LVDS Differential Clock Input
RxCLKIn
I
1 Positive LVDS Differential Clock Input
RxOut
O
28/21 LVTTL Level Data Output
Goes HIGH for PwrDn LOW
RxCLKOut O
1 LVTTL Clock Output
PwrDn
I
PLL VCC
I
PLL GND
I
LVDS VCC
I
LVDS GND I
VCC
I
GND
I
NC
1 LVTTL Level Input
Refer to Transmitter and Receiver Power-Up and Power-Down Operation Truth Table
1 Power Supply Pin for PLL
2 Ground Pins for PLL
1 Power Supply Pin for LVDS Input
3 Ground Pins for LVDS Input
4 Power Supply for LVTTL Output
5 Ground Pin for LVTTL Output
No Connect
Connection Diagram
FIN3386 and FIN3384 (4:28 Receiver)
Pin Assignment for TSSOP
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4