FIN3383 查看數據表（PDF） - Fairchild Semiconductor
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FIN3383 Datasheet PDF : 18 Pages
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Transmitter and Receiver Power-Up/Power-Down Operation Truth Table
The outputs of the transmitter remain in the High-Impedance state until the power supply reaches 2V. The following table
shows the operation of the transmitter during power-up and power-down and operation of the PwrDn pin.
Transmitter
VCC
2V
TxIn
X
TxOut
Z
TxCLKIn
X
TxCLKOutr
Z
PwrDn
L
Receiver
RxInr
X
RxOut
Z
RxCLKInr
X
RxCLKOut
Z
PwrDn
L
H HIGH Logic Level
L LOW Logic Level
P Last Valid State
X Don’t Care
Z High-Impedance
VCC
2V
PwrDn
!2V
X
Z
X
Z
L
PwrDn
X
L
X
(Note 5)
L
2V
Normal
!2V
Active
Active
Active
Active
H
Active
L/H
Active
Active
H
2V
!2V
Active
X
H/L/Z
(Note 3)
H
Active
P
(Note 4)
(Note 5)
H
2V
!2V
H
(Note 4)
H
Active
(Note 5)
H
2V
!2V
H
(Note 4)
P
(Note 4)
(Note 5)
H
2V
Note 3: If the transmitter is powered up and PwrDn is inactive HIGH and the clock input goes to any state LOW, HIGH, or Z then the internal PLL will go to a
known low frequency and stay until the clock starts normal operation again.
Note 4: If the input is terminated and un-driven (Z) or shorted or open. (fail safe condition)
Note 5: For PwrDn or fail safe condition the RxCLKOut pin will go LOW for Panel Link devices and HIGH for Channel Link devices.
Note 6: Shorted here means (r inputs are shorted to each other, or r inputs are shorted to each other and Ground or VCC, or either r inputs are shorted to
Ground or VCC) with no other Current/Voltage sources (noise) applied. If the VID is still in the valid range (greater than 100mV) and VCM is in the valid range
(0V to 2.4V) then the input signal is still recognized and the part will respond normally.
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