FM1808B 查看數據表（PDF） - Cypress Semiconductor
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FM1808B Datasheet PDF : 12 Pages
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FM1808B – 256Kb Bytewide 5V F-RAM
Write Cycle Timing - /WE Controlled Timing
CE
A0-14
WE
tAH
tAS
tWS
tWC
tCA
tC W
tWP
OE
DQ0-7
out
DQ0-7
in
tWZ
tDS
Power Cycle Timing
VDD
CE
VDD (min)
t PD
t PC
VIH (min)
VIH (min)
tPC
tWH
tWX
tDH
VDD (min)
t PU
VIL (max)
Power Cycle Timing (TA = -40 C to + 85 C, VDD = 4.5V to 5.5V unless otherwise specified)
Symbol Parameter
Min
Max Units
tPU
VDD(min) to First Access Start
tPD
Last Access Complete to VDD(min)
tVR
VDD Rise Time
tVF
VDD Fall Time
10
-
ms
0
-
s
30
-
s/V
30
-
s/V
Notes
1. Slope measured at any point on VDD waveform.
Notes
1
1
Document Number: 001-86209 Rev. **
Page 9 of 12
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