FM24CL04 查看數據表（PDF） - Unspecified

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FM24CL04

4Kb FRAM Serial Memory

Unspecified 

FM24CL04

Diagram Notes

All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read

and write cycles. Write timing parameters apply to slave address, word address, and write data bits. Functional

relationships are illustrated in the relevant data sheet sections. These diagrams illustrate the timing parameters only.

Read Bus Timing

Write Bus Timing

Data Retention (VDD = 2.7V to 3.65V unless otherwise specified)

Parameter

Min

Units

Data Retention

10

Years

Notes

1

Notes

1. The relationship between retention, temperature, and the associated reliability

level is characterized separately.

Rev. 2.0

July 2003

Page 11 of 12

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