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FM24C04A 查看數據表(PDF) - Ramtron International Corporation

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FM24C04A
RAMTRON
Ramtron International Corporation RAMTRON
FM24C04A Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
FM24C04A
Diagram Notes
All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read
and write cycles. Write timing parameters apply to slave address, word address, and write data bits. Functional
relationships are illustrated in the relevant data sheet sections. These diagrams illustrate the timing parameters only.
Read Bus Timing
tR
tHIGH
tF
tLOW
tSP
tSP
SCL
SDA
tSU:SDA
tBUF
1/fSCL
tHD:DAT
tSU:DAT
Start
Stop Start
tAA
tDH
Acknowledge
Write Bus Timing
SCL
SDA
tSU:STO
tHD:STA
tHD:DAT
tSU:DAT
Start
Stop Start
t AA
Acknowledge
Data Retention (VDD = 4.5V to 5.5V, +85° C)
Parameter
Min
Data Retention
45
Units
Years
Notes
Rev. 3.0
Mar. 2005
10 of 12

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