FSL126MRT 查看數據表（PDF） - Fairchild Semiconductor
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FSL126MRT Datasheet PDF : 13 Pages
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Pin Configuration
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
1
2
3
4
5
6
Name
Drain
GND
VCC
FB
NC
VSTR
Description
SenseFET Drain. High-voltage power SenseFET drain connection.
Ground. This pin is the control ground and the SenseFET source.
Power Supply. This pin is the positive supply input, which provides the internal operating
current for both startup and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM comparator.
The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor
should be placed between this pin and GND. If the voltage of this pin reaches 7V, the overload
protection triggers, which shuts down the FPS.
No Connection
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link.
At startup, the internal high-voltage current source supplies internal bias and charges the
external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current
source (ICH) is disabled.
© 2012 Fairchild Semiconductor Corporation
FSL126MRT • Rev. 1.0.0
3
www.fairchildsemi.com
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