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GS1574A Datasheet PDF : 16 Pages
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Table 1-1: GS1574A Pin Descriptions (Continued)
Pin
Number
9
Name
VEE_D
Timing
Analog
10, 11
12
SDO, SDO
VEE_D
Analog
Analog
13
VCC_D
Analog
14
MUTE
Not
Synchronous
15
CD
Not
Synchronous
16
VCC_A
Analog
–
Center Pad
–
Type
Power
Output
Power
Power
Input
Output
Power
Power
Description
Most negative power supply for the digital circuitry and output buffer.
Connect to GND.
Equalized serial digital differential output.
Most negative power supply for the digital circuitry and output buffer.
Connect to GND.
Most positive power supply for the digital I/O pins of the device.
Connect to +3.3V DC.
CONTROL SIGNAL INPUT
levels are LVCMOS/LVTTL compatible. (3.3V Tolerant)
When the MUTE pin is set HIGH by the application interface, the serial
digital output of the device will be forced to a steady state.
When the MUTE pin is set LOW, the serial digital output of the device will
be active.
NOTE: This pin may be connected directly to the CD pin to allow mute on
loss of carrier.
STATUS SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Indicates the presence of a good input signal.
When the CD pin is LOW, a good input signal has been detected.
When this pin is HIGH, the input signal is invalid.
This pin will indicate loss of carrier for data rates > 19Mb/s.
Most positive power supply for the analog circuitry of the device.
Connect to +3.3V DC.
Internally bonded to VEE_A.
GS1574A HD-LINX® II Adaptive Cable Equalizer
Data Sheet
33416 - 10
August 2011
5 of 16
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