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GS9005B 查看數據表(PDF) - Gennum -> Semtech

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GS9005B Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
tD
tD
SERIAL
DATA OUT
(SD0)
AGC
VCC1 VEE1 CAP A/D SSI VEE2 VCC4
4
3
2
DDI
5
DDI
6
28 27 26
25
SD0
24
SD0
SERIAL
CLOCK OUT
(SCK)
50%
50%
VCC2
7
SDI
8
SDI
9
GS9005B
TOP VIEW
23
SC0
22
SC0
21
SS1
Fig.1 Waveforms
ƒ/2 EN
10
20
SS0
VEE3
11
19
CD
12 13 14 15 16 17 18
D LOOP RVCO0 RVCO1 RVCO2 OEM RVCO3 VCC3
E FILT
Fig. 2 GS9005B Pin Connections
D GS9005B PIN DESCRIPTIONS
N S PIN NO. SYMBOL TYPE
DESCRIPTION
ME IGN 1
A/D
Input
Analog/Digital Select. TTL compatible input used to select the input signal source. A logic HIGH routes the
Equalizer inputs (pins 8 and 9) to the PLL and a logic LOW routes the Direct Digital inputs (pins 5 and 6)
to the PLL.
M S 2
AGC CAP Input
O E 3
VEE1
4
VCC1
C D 5,6 DDI/DDI Input
RE W 7
VCC2
E 8,9 SDI/SDI Input
OT N 10 ƒ/2 EN
N R 11
VEE3
Input
FO 12 LOOP FILT
AGC Capacitor. Connection for the AGC capacitor.
Power Supply. Most negative power supply connection. (Equalizer)
Power Supply. Most positive power supply connection. (Equalizer)
Direct Data Inputs (true and inverse). Pseudo-ECL, differential serial data inputs. These are selected
when the A/D input (pin 1) is at logic LOW and are self biased to 1.2 volts below VCC. They may be
directly driven from true ECL drivers when VEE = -5V and VCC= 0 V.
Power Supply. Most positive power supply connection. ( Phase detector, A/D select, carrier detect).
Serial Data Inputs (true and inverse). Differential analog serial data inputs. Inputs must be AC
coupled and may be driven single ended. These inputs are selected when the A/D input (pin 1) is
logic HIGH.
ƒ/2 Enable-TTL compatible input used to enable the divide by 2 function.
Power Supply. Most negative power supply connection. (VCO, Mux, Standard Select)
Loop Filter. Node for connecting the loop filter components.
13
RVCO0
Input
VCO Resistor 0. Analog current input used to set the centre frequency of the VCO when the two
Standard Select bits (pins 20 and 21) are set to logic 0,0. A resistor is connected from this pin to VEE.
14
RVCO1
Input
VCO Resistor 1. Analog current input used to set the centre frequency of the VCO when Standard
Select bit 0 (pin 20) is set HIGH and bit 1 (pin 21) is set LOW. A resistor is connected from this pin to VEE.
15
RVCO2
Input
VCO Resistor 2. Analog current input used to set the centre frequency of the VCO when Standard
Select bit 0 (pin 20) is set LOW and bit 1 (pin 21) is set HIGH. A resistor is connected from this pin to VEE.
16 OEM
Output Output Eye Monitor Analog voltage representing the serial bit stream after equalization but before reslicing.
17
RVCO3
Input
VCO Resistor 3. Analog current input used to set the centre frequency of the VCO when the two
Standard Select bits (pins 20 and 21) are set HIGH. A resistor is connected from this pin to VEE.
4 of 13
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