GTL2002 查看數據表（PDF） - NXP Semiconductors.
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GTL2002 Datasheet PDF : 27 Pages
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NXP Semiconductors
GTL2002
2-bit bidirectional low voltage translator
6.2 Pin description
Table 3.
Symbol
GND
SREF
S1
S2
D2
D1
DREF
GREF
Pin description
Pin
SO8, TSSOP8, VSSOP8
XQFN8U
1
4
2
1
3
2
4
3
5
5
6
6
7
7
8
8
Description
ground (0 V)
source of reference transistor
port S1
port S2
port D2
port D1
drain of reference transistor
gate of reference transistor
7. Functional description
Refer to Figure 1 “Functional diagram”.
7.1 Function selection
Table 4. Function selection, HIGH to LOW translation
Assuming Dn is at the higher voltage level.
H = HIGH voltage level; L = LOW voltage level; X = Don’t care.
GREF[1]
DREF
SREF
Input Dn
H
H
0V
X
H
H
VTT[4]
H
H
H
VTT[4]
L
L
L
0 V VTT[4]
X
Output Sn
X
VTT[2][4]
L[3]
X
[1] GREF should be at least 1.5 V higher than SREF for best translator operation.
[2] Sn is not pulled up or pulled down.
[3] Sn follows the Dn input LOW.
[4] VTT is equal to the SREF voltage.
Transistor
off
on
on
off
GTL2002
Product data sheet
Table 5. Function selection, LOW to HIGH translation
Assuming Dn is at the higher voltage level.
H = HIGH voltage level; L = LOW voltage level; X = Don’t care.
GREF[1]
DREF
SREF
Input Sn
H
H
0V
X
H
H
VTT[4]
VTT[4]
H
H
VTT[4]
L
L
L
0 V VTT[4]
X
Output Dn
X
H[2]
L[3]
X
Transistor
off
nearly off
on
off
[1] GREF should be at least 1.5 V higher than SREF for best translator operation.
[2] Dn is pulled up to VCC through an external resistor.
[3] Dn follows the Sn input LOW.
[4] VTT is equal to the SREF voltage.
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 19 August 2013
© NXP B.V. 2013. All rights reserved.
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