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HCF40101M013TR(2002) 查看數據表(PDF) - STMicroelectronics

零件编号
产品描述 (功能)
生产厂家
HCF40101M013TR
(Rev.:2002)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
HCF40101M013TR Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HCF40101B
9 BIT PARITY GENERATOR CHECKER
s STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
s QUIESCENT CURRENT SPECIFIED UP TO
20V
s 5V, 10V AND 15V PARAMETRIC RATINGS
s INPUT LEAKAGE CURRENT
II = 100nA (MAX) AT VDD = 18V TA = 25°C
s 100% TESTED FOR QUIESCENT CURRENT
s MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
HCF40101B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
HCF40101B is a 9-bit (8 data bits plus 1 parity bit)
parity generator/checker. It may be used to detect
errors in data transmission or data retrieval. Odd
and even outputs facilitate odd or even parity
generation and checking. When used as a parity
generator, a parity bit is supplied along with the
data to generate an even or odd parity output.
DIP
SOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
HCF40101BEY
HCF40101BM1
T&R
HCF40101M013TR
When used as a parity checker, the received data
bits and parity bits are compared for correct parity.
The even or odd outputs are used to indicate an
error in the received data. Word-length capability
is expandable by cascading. HCF40101B is also
provided with an inhibit control. If the inhibit control
is set at logical "1", the even and odd outputs go to
a logical "0"
PIN CONNECTION
September 2002
1/9

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