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HCPL-0723-500 查看數據表(PDF) - HP => Agilent Technologies

零件编号
产品描述 (功能)
生产厂家
HCPL-0723-500
HP
HP => Agilent Technologies HP
HCPL-0723-500 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Switching Specifications
Test conditions that are not specified can be anywhere within the recommended operating range.
All typical specifications are at TA = +25°C, VDD1 = VDD2 = +5 V.
Parameter
Symbol Min. Typ. Max. Units Test Conditions
Propagation Delay Time to Logic
tPHL
Low Output[3]
16 22 ns
CL = 15 pF CMOS Signal Levels
Propagation Delay Time to Logic
tPLH
High Output[3]
16 22 ns
CL = 15 pF CMOS Signal Levels
Pulse Width
PW
20
ns
CL = 15 pF CMOS Signal Levels
Maximum Data Rate
50
Pulse Width Distortion[4] |tPHL - tPLH| |PWD|
1
Propagation Delay Skew[5]
tPSK
MBd CL = 15 pF CMOS Signal Levels
2
ns
CL = 15 pF CMOS Signal Levels
16 ns
CL = 15 pF CMOS Signal Levels
Output Rise Time (10% – 90%)
tR
8
ns
CL = 15 pF CMOS Signal Levels
Output Fall Time (90% - 10%)
tF
6
ns
CL = 15 pF CMOS Signal Levels
Common Mode Transient Immunity
at Logic High Output[6]
|CMH| 10 15
kV/µs VCM = 1000 V, TA = 25°C,
VI = VDD1, VO > 0.8 VDD2
Common Mode Transient Immunity
at Logic Low Output[6]
|CML| 10 15
kV/µs VCM = 1000 V, TA = 25°C,
VI = 0 V, VO < 0.8 V
8

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