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HCPL-0723-000E 查看數據表(PDF) - Avago Technologies

零件编号
产品描述 (功能)
生产厂家
HCPL-0723-000E
AVAGO
Avago Technologies AVAGO
HCPL-0723-000E Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Package Characteristics
All Typical Specifications are at TA = 25°C.
Parameter
Symbol Min. Typ. Max. Units Test Conditions
Input-Output Momentary
Withstand Voltage[7,8,9]
–7723
VISO
Option 020
–0723
3750
V rms RH ≤ 50%, t = 1 min,
5000
TA = 25°C
3750
Input-Output Resistance[7] R I-O 10 12
VI-O = 500 V dc
Input-Output Capacitance
C I-O
0.6
pF
f = 1 MHz
Input Capacitance[10] C I 3.0 pF
Input IC Junction-to-Case
Thermal Resistance
–7723
θjci
–0723         
145
°C/W Thermocouple located at
160 center underside of package
Output IC Junction-to-Case
Thermal Resistance
–7723
θjco
–0723
145 °C/W
135
Package Power Dissipation
PPD 150 mW
Notes:
1. Absolute Maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not
guarantee functionality.
2. The LED is ON when VI is low and OFF when VI is high.
3. tPHL propagation delay is measured from the 50% level on the falling edge of the VI signal to the 50% level of the falling edge of the VO sig-
nal. tPLH propagation delay is measured from the 50% level on the rising edge of the VI signal to the 50% level of the rising edge of the VO
signal.
4. PWD is defined as |tPHL - tPLH|. %PWD (percent pulse width distortion) is equal to the PWD divided by pulse width.
5. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature
within the recommended operating conditions.
6. CMH is the maximum common mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum com-
mon mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common mode voltage slew rates apply to both rising
and falling common mode voltage edges.
7. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
8. In accordance with UL1577, each HCPL-0723 is proof tested by applying an insulation test voltage ≥ 4500 Vrms for 1 second (leakage detec-
tion current limit, II-O ≤ 5 µA). Each HCPL-7723 is proof tested by applying an insulation test voltage ≥ 4500 Vrms for 1 second (leakage detec-
tion current limit. II-O ≤ 5 µA.)
9. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to your equipment level safety specification or Avago Application Note 1074 entitled
“Optocoupler Input-Output Endurance Voltage.”
10. CI is the capacitance measured at pin 2 (VI).
9

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