HD74HC107 查看數據表（PDF） - Renesas Electronics

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HD74HC107

Dual J-K Flip-Flops (with Clear)

Renesas Electronics 

HD74HC107

Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)

Item

Setup time

Hold time

Removal time

Output rise/fall

time

Input capacitance

Symbol VCC (V)

tsu

2.0

4.5

6.0

th

2.0

4.5

6.0

trem

2.0

4.5

6.0

tTLH, tTHL 2.0

4.5

6.0

Cin

—

Ta = 25°C

Ta = –40 to +85°C

Min Typ Max Min Max Unit

Test Conditions

100 — — 125

— ns J or K to Clock

20 3 —

25

—

17 — —

21

—

5 ——

5

— ns Clock to J or K

5 –2 —

5

—

5 ——

5

—

100 — — 125

— ns Clear to Clock

20 0 —

25

—

17 — —

21

—

— — 75

—

95 ns

— 5 15

—

19

— — 13

—

16

— 5 10

—

10 pF

Test Circuit

VCC

VCC

Input

Pulse generator

Zout = 50 Ω

Input

Pulse generator

Zout = 50 Ω

Output

J

Q

Clock

CL = 50 pF

Output

K

Q

Clear

CL = 50 pF

Note: CL includes the probe and jig capacitance.

Rev.2.00, Oct 06, 2005 page 4 of 7

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