HD74HC191FPEL 查看數據表（PDF） - Renesas Electronics

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HD74HC191FPEL

HD74HC190P HD74HC191P HD74HC190FPEL HD74HC191FPEL HD74HC190RPEL HD74HC191RPEL

Renesas Electronics 

HD74HC190, HD74HC191

Logic Diagram

HD74HC190

Clock

Down/Up

Input A

Enable G

Input B

Input C

Input D

Load

HD74HC191

Clock

Down/Up

Input A

Enable G

Input B

Input C

Input D

Load

Rev.3.00, Jan 31, 2006 page 5 of 12

CK P Q

CK A

INCL Q

CK P Q

CK B

INCL Q

CK P Q

CK C

INCL Q

CK P Q

CK D

INCL Q

Ripple

Clock

Max/Min

Output

QA

QB

QC

QD

CK P Q

CK A

INCL Q

CK P Q

CK B

INCL Q

CK P Q

CK C

INCL Q

CK P Q

CK D

INCL Q

Ripple

Clock

Max/Min

Output

QA

QB

QC

QD

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