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HD74HC126RPEL 查看數據表(PDF) - Renesas Electronics

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HD74HC126RPEL
Renesas
Renesas Electronics Renesas
HD74HC126RPEL Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HD74HC125/HD74HC126
Quad. Bus Buffer Gates (with 3-state outputs)
REJ03D0565-0200
(Previous ADE-205-439)
Rev.2.00
Oct 11, 2005
Description
The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into the high
impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low to put the output into
high impedance.
Features
High Speed Operation: tpd = 8 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC125P
HD74HC126P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74HC125FPEL
SOP-14 pin (JEITA)
HD74HC125FPEL
PRSP0014DF-B
(FP-14DAV)
FP
PRSP0014DE-A
HD74HC126RPEL SOP-14 pin (JEDEC) (FP-14DNV)
RP
HD74HC125TELL
TSSOP-14 pin
HD74HC126TELL
PTSP0014JA-B
T
(TTP-14DV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
C
A
HC125
HC126
H
L
X
L
H
L
L
H
H
H : High level
L : Low level
X : Irrelevant
Z : Off (high-impedance) state of a 3-state output.
HC125
Z
L
H
Output
Y
HC126
Z
L
H
Rev.2.00, Oct 11, 2005 page 1 of 8

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