HD74HCT688RPEL 查看數據表（PDF） - Renesas Electronics
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HD74HCT688RPEL Datasheet PDF : 8 Pages
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HD74HCT688
8-bit Magnitude Comparator
REJ03D0673–0200
(Previous ADE-205-563)
Rev.2.00
Mar 30, 2006
Description
The HD74HCT688 compares bit for bit two 8-bit words and indicates whether or not they are equal. The P=Q output
indicates equality when it is low.
A single active low enable is provided to facilitate cascading of several packages and enable comparison of words
greater than 8-bits.
This device is useful in memory block decoding applications, where memory block enable signals must be generated
from computer address information.
Features
• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
• High Speed Operation: tpd (Data to P=Q) = 18 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 4.5 to 5.5 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HCT688P
DILP-20 pin (JEDEC)
PRDP0020AC-B
P
(DP-20NEV)
HD74HCT688FPEL SOP-20 pin (JEITA)
PRSP0020DD-B
(FP-20DAV)
FP
PRSP0020DC-A
HD74HCT688RPEL SOP-20 pin (JEDEC)
(FP-20DBV)
RP
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
Function Table
Data P, Q
P=Q
P>Q
P<Q
X
H : high level
L : low level
X : irrelevant
Input
Enable G
L
L
L
H
Output P=Q
L
H
H
H
Rev.2.00, Mar 30, 2006 page 1 of 7
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