HDMP-1636A 查看數據表（PDF） - HP => Agilent Technologies

零件编号

产品描述 (功能)

生产厂家

HDMP-1636A

Gigabit Ethernet and Fibre Channel SerDes ICs

HP => Agilent Technologies 

5

HDMP-1636/1646A/T1636A (Transmitter Section) – Fibre Channel

Timing Characteristics

TA[1] = 0°C to +70°C, VCC = 3.15 V to 3.45 V

Symbol

Parameter

Units

Min.

Typ.

tsetup

Setup Time

nsec

2

thold

t_txlat[2]

Hold Time

Transmitter Latency

nsec

nsec

1.5

4.2

bits

4.4

Max.

Notes:

1. Device tested and characterized under TA conditions specified, with TC monitored at approximately 20° higher than TA.

2. The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the parallel data word (as triggered

by the rising edge of the transmit byte clock, REFCLK) and the transmission of the first serial bit of that parallel word (defined by

the rising edge of the first bit transmitted).

REFCLK

TX[0]-TX[9]

DATA

DATA

DATA

tSETUP

tHOLD

Figure 3. Transmitter Section Timing.

DATA

DATA

1.4 V

2.0 V

0.8 V

DATA BYTE A

DATA BYTE B

± DOUT T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5

t_TXLAT

TX[0]-TX[9]

DATA BYTE B

DATA BYTE C

REFCLK

1.4 V

Figure 4. Transmitter Latency.

Share Link: